Type: | BUG |
Severity: | NA |
Release Date: | 2019-05-06 |
[4.5.0-10.0.1]
- bump the version
[4.5.0-10.el7_6.7]
- cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4 (rhbz#1687515)
- cputest: Add data for Intel(R) Core(TM) i7-7600U (rhbz#1687515)
- cputest: Add data for Intel(R) Xeon(R) CPU E7540 (rhbz#1687515)
- cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 (rhbz#1687515)
- cputest: Add data for Intel(R) Core(TM) i7-8700 (rhbz#1687515)
- cpu_x86: Separate signature parsing from x86ModelParse (rhbz#1687515)
- cpu_x86: Add x86ModelCopySignatures helper (rhbz#1687515)
- cpu_x86: Store CPU signature in an array (rhbz#1687515)
- cpu_x86: Allow multiple signatures for a CPU model (rhbz#1687515)
- cpu_map: Add hex representation of signatures (rhbz#1687515)
- cpu_map: Add more signatures for Conroe CPU model (rhbz#1687515)
- cpu_map: Add more signatures for Penryn CPU model (rhbz#1687515)
- cpu_map: Add more signatures for Nehalem CPU models (rhbz#1687515)
- cpu_map: Add more signatures for Westmere CPU model (rhbz#1687515)
- cpu_map: Add more signatures for SandyBridge CPU models (rhbz#1687515)
- cpu_map: Add more signatures for IvyBridge CPU models (rhbz#1687515)
- cpu_map: Add more signatures for Haswell CPU models (rhbz#1687515)
- cpu_map: Add more signatures for Broadwell CPU models (rhbz#1687515)
- cpu_map: Add more signatures for Skylake-Client CPU models (rhbz#1687515)
- cpu: Don't access invalid memory in virCPUx86Translate (rhbz#1687515)
- cpu_x86: Log decoded CPU model and signatures (rhbz#1687515)
- util: Modify virStorageFileGetSCSIKey return (rhbz#1687715)
- storage: Rework virStorageBackendSCSISerial (rhbz#1687715)
- util: Introduce virStorageFileGetNPIVKey (rhbz#1687715)
- storage: Fetch a unique key for vHBA/NPIV LUNs (rhbz#1687715)
Release/Architecture | Filename | MD5sum | Superseded By Advisory |
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