OVMSA-2018-0232

OVMSA-2018-0232 - xen security update

Type:SECURITY
Severity:IMPORTANT
Release Date:2018-06-27

Description


[4.4.4-196.0.1.el6]
- BUILDINFO: OVMF commit=173bf5c847e3ca8b42c11796ce048d8e2e916ff8
- BUILDINFO: xen commit=b059d1de3b211fe5582c63f64b4822b9f85eafd2
- BUILDINFO: QEMU upstream commit=8bff6989bd0bafcc0ddf859c23ce6a2ff21a80ff
- BUILDINFO: QEMU traditional commit=346fdd7edd73f8287d0d0a2bab9c67b71bc6b8ba
- BUILDINFO: IPXE commit=9a93db3f0947484e30e753bbd61a10b17336e20e
- BUILDINFO: SeaBIOS commit=7d9cbe613694924921ed1a6f8947d711c5832eee
- xend: fix memory leak of XendConfig.XendConfig object (Manjunath Patil) [Orabug: 28165871]
- x86/HVM: Restart ioreq processing state machine (Boris Ostrovsky) [Orabug: 28200424]
- x86/spec-ctrl: Mitigations for LazyFPU (Andrew Cooper) [Orabug: 28135175] {CVE-2018-3665}
- x86: Support fully eager FPU context switching (Andrew Cooper) [Orabug: 28135175] {CVE-2018-3665}
- svm: fix incorrect TSC scaling (Haozhong Zhang) [Orabug: 27182906]
- x86/AMD-ucode: correct multiple container handling (Jan Beulich) [Orabug: 28157269]
- x86, amd_ucode: fix coverity issues found in cpu_request_microcode() (Aravind Gopalakrishnan) [Orabug: 28157269]
- [xenmicrocode] Fix error reporting on successful return from tool (Ross Philipson) [Orabug: 28128754]
- x86: correct default_xen_spec_ctrl calculation (Jan Beulich) [Orabug: 28035001]
- x86/msr: Virtualise MSR_SPEC_CTRL.SSBD for guests to use (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/Intel: Mitigations for GPZ SP4 - Speculative Store Bypass (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/AMD: Mitigations for GPZ SP4 - Speculative Store Bypass (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Introduce a new command line argument to replace (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/cpuid: Improvements to guest policies for speculative sidechannel features (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Explicitly set Xens default MSR_SPEC_CTRL value (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Split X86_FEATURE_SC_MSR into PV and HVM variants (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Elide MSR_SPEC_CTRL handling in idle context when possible (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Rename bits of infrastructure to avoid NATIVE and VMEXIT (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Fold the XEN_IBRS_{SET,CLEAR} ALTERNATIVES together (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Merge bti_ist_info and use_shadow_spec_ctrl into spec_ctrl_flags (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Express Xens choice of MSR_SPEC_CTRL value as a variable (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Read MSR_ARCH_CAPABILITIES only once (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Assume that STIBP feature is always available (Boris Ostrovsky) [Orabug: 28035001] {CVE-2018-3639}
- x86/spec_ctrl: Updates to retpoline-safety decision making (Andrew Cooper) [Orabug: 28035001] {CVE-2018-3639}
- Revert 'x86/boot: Disable IBRS in intr/nmi exit path at bootup stage' (Boris Ostrovsky) [Orabug: 28035001] {CVE-2018-3639}


Related CVEs


CVE-2018-3639
CVE-2018-3665

Updated Packages


Release/ArchitectureFilenameMD5sumSuperseded By Advisory
Oracle VM 3.4 (x86_64) xen-4.4.4-196.0.1.el6.src.rpm6ad0d49fd351b471e216e5c30fcc74deOVMSA-2021-0014
xen-4.4.4-196.0.1.el6.x86_64.rpm93a7dfeec3351f9b4aeec670205744fcOVMSA-2021-0014
xen-tools-4.4.4-196.0.1.el6.x86_64.rpma76eb63602e50f3e4eb2d28d3ebcbf2fOVMSA-2021-0014



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