ELBA-2020-0847

ELBA-2020-0847 - binutils bug fix and enhancement update

Type:BUG
Severity:NA
Release Date:2020-03-18

Description


[2.27-41.base.0.2]
Adds 5 patches from the OL 7.5 Aarch64 source and does the following:
- Backports with binutils-aarch64-gold-check-MOVW_xABS-relocations-for-plt.patch:
7ae39e2d406d - Check if symbols with MOVW_.ABS relocations require PLT entries.
[Orabug: 28829875]
- Reverts the following RH patches to re-enable ifunc tests:
Patch25: binutils-2.27-skip-ld-aarch64-ifunc-exec-tests.patch
Patch27: binutils-2.27-remove-pr19784-test.patch
- Backports the following patches with binutils-aarch64-ifunc-relocations.patch
to fix 'FAIL: Run pr18841 with libpr18841c.so'
f2e6a8430e72 - [AArch64] Fix PR18841 ifunc relocation ordering
545bc2b377db - [AArch64] Skip IFUNC relocations in debug sections
[Orabug: 26880935]
- Backports following patch with binutils-aarch64-stub-alignment.patch:
9a2ebffd4dd9 - Ensure 8-byte alignment for AArch64 stubs.
- Backports following patch with binutils-aarch64-pr19327.patch:
d68f19767dfb - [AArch64] Use SYMBOL_REFERENCES_LOCAL in one symbol check
[Orabug: 27025570]
- Reviewed-by: Jose E. Marchesi

[2.27-41.base.3]
- Allow the BFD library to handle the copying of files containing secondary reloc sections. (#1804149)

[2.27-41.base.2]
- Implement assembler workaround for Intel JCC microcode bug. (#1782776)

[2.27-41.base.1]
- Stop the BFD library from complaining about multiple reloc sections for the same code section. (#1755779)




Updated Packages


Release/ArchitectureFilenameMD5sumSuperseded By Advisory



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